Non-blocking electro-optic network-on-chip router for high-throughput and low-power many-core systems
説明
Photonic Networks-on-Chip (PNoCs) have been proposed as a promising solution to solve the problems of their electronic counterparts. By offering low latency, ultra-high throughput and low power dissipation, PNoCs have opened a new horizon for future generation of many-core systems. An optical router for routing and flow control functions is the backbone component for these networks. In this paper, we propose a new non-blocking electro-optic router integrated in a mesh-based NoC system (PHENIC)1. When compared to similar non-blocking based architecture, the evaluation results show that the proposed router reduces the End-To-End latency by 40%. In addition, evaluation results show a considerable improvement in terms of energy consumption by up to 44%.
収録刊行物
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- 2015 World Congress on Information Technology and Computer Applications (WCITCA)
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2015 World Congress on Information Technology and Computer Applications (WCITCA) 1-7, 2015-06-01
IEEE