説明
This paper describes a low power mixer implemented in a standard 0.25 um CMOS process. The mixer uses lateral bipolar transistors in CMOS to form the core of the circuit. No additional processing steps are needed to obtain the BJT when the MOSFET is properly designed. The mixer exhibits 6.5 dB gain, operating at 1.9 GHz from a 1 V supply and a power dissipation of 1.3 mW. Such a mixer is a likely candidate for low power portable wireless applications.
収録刊行物
-
- Proceedings of the 2001 international symposium on Low power electronics and design - ISLPED '01
-
Proceedings of the 2001 international symposium on Low power electronics and design - ISLPED '01 112-116, 2001-01-01
ACM Press
