A loosely-coupled parallel graphics architecture based on a conflict-free multiport frame buffer
説明
This paper describes a parallel computer architecture for real-time image synthesis. The architecture is based on a loosely-coupled array of general purpose processors equipped with a novel frame buffer subsystem called a conflict-free multiport frame buffer (CFMFB) which enables every processor to write any region of the screen without access conflicts. An efficient polygon rendering method using the CFMFB is also described. The method assigns a subset of the polygons to each processor, which independently calculates the images of the assigned polygons with the Z-buffer algorithm. The performance of the system is estimated through simulation experiments with sample scenes. >
収録刊行物
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- Proceedings of the Third Workshop on Future Trends of Distributed Computing Systems
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Proceedings of the Third Workshop on Future Trends of Distributed Computing Systems 411-418, 2003-01-02
IEEE Comput. Soc. Press