説明
In recent years Field Programmable Gate Arrays (FPGAs) have emerged as an attractive means to implement low volume applications and prototypes due to their low cost, reprogrammability and rapid turnaround times. Therefore, the need for design methods of FPGAs are getting larger and larger. In this paper, two methods to optimize networks which have been mapped for lookup-table-based FPGAs are discussed. These methods utilize the notion of compatible sets of permissible functions (CSPFs) of Transduction Method. Experimental results show the effectiveness of our methods.
収録刊行物
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- Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair
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Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair 353-356, 1995-01-01
Nihon Gakkai Jimu Senta