Pulse modulation circuit architecture and its application to functional image sensors
説明
Analog-digital merged circuit architecture using pulse modulation signals and its application to functional image sensors with parallel focal plane processing are reported. The architecture is based on switched current integration and time domain charge-to-pulse conversion techniques. Parallel analog calculations such as add/sub and multiply/add are realized with low supply voltage and low power dissipation utilizing deep-sub /spl mu/m CMOS technologies. A functional CMOS image sensor which realizes parallel PWM readout, block averaging for gray scale image data, and simple pattern detection, and calculations for x- and y-projections and centers of gravity of binary image data, is proposed. A functional image sensor test chip with 56/spl times/56 pixels was fabricated in a 6 mm/spl times/6 mm chip with a 0.8 /spl mu/m CMOS technology is described.
収録刊行物
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- 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)
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2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353) 2 301-304, 2002-11-07
Presses Polytech. Univ. Romandes