Pure-capacitance-load source-follower comparators for low-power winner-take-all circuitry
説明
DC-current-free pure-capacitance-load source-follower comparators have been developed for low-power winner-take-all circuits. The concept of charge-transfer amplifier was implemented in the CMOS source-follower configuration as well as in NMOS and PMOS source-followers. In the former, the separate gate biases to NMOS and PMOS and the positive feedback scheme have enabled a nearly full logic swing operation. In the latter, the trigger type comparator was formed by cascaded PMOS and NMOS source-followers. Two types of WTA circuits, namely the binary-search type WTA and the ramp-voltage-scan type WTA, were developed using the feedback type and the trigger type comparators, respectively. The test circuits were fabricated in a 0.6-/spl mu/m double-polysilicon triple-metal CMOS technology, and their operation was experimentally verified.
収録刊行物
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- 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)
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2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353) 3 III-759, 2003-06-25
IEEE
