Asynchronous interface specification, analysis and synthesis

Interfaces, by nature, are often asynchronous since they serve for connecting multiple distributed mod ules/agents without common clock. However, the most recent developments in the the ory of asynchronous design in the areas of specifications, mo dels, analysis, verification, synthesis, technology mapping, timing optimization and performanc e analysis are not widely known and r arely accepted by industry.The go al of this tutorial is to fill this gap and to present an overview of one p opular systematic design methodology for design of asynchronous interface controllers. This metho dology is based on using P etri nets (PN) a formal mo del that, from the engine ering standpoint, is a formalization of timing diagrams (waveforms) and from the system designer standpoint is a concurrent state machine, in which lo cal comp onents can perform indep endent or interdependent concurrent actions, changing their local states asynchronously. We will introduce this mo del informally b ased on a simple example: a VME-bus controller serving reads from a devic e to a bus and writes f rom the bus into the devic e.