Divide And Merge Image Processing For Pattern Defect Analysis Of Printed Circuit Boards

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説明

This paper presents a methodology for an optical inspection of a large printed circuit board with fine pithes. Since there exist some limitations due to the available line sensors, memory capacity, and the processors, a sequential scan is suggested to collect a number of subimages (partially divided images) of the entire board. All pattern information obtained from each subimage should be integrated to yield total information about the board. The divide and merge image processings are discussed. Recent addition of a new preprocessing to the initial system reduces imaginary or fault defect appearance rate, which in turn makes it easy to analyze multiple defects effectively. The results of the current system is are demonstrated and some inspected examples are also presented.

収録刊行物

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