An Implementation of the Neuro-fuzzy Inference Circuit
説明
In this paper, we propose a neuro-fuzzy inference circuit suitable for real-time learning application. We could confirm through our experimental use of the FPGA that the circuit can realize a high speed tuning of inference rules first by doing the parallel processing of the operations and then by fixing the membership functions of the antecedent part
収録刊行物
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- First International Conference on Innovative Computing, Information and Control - Volume I (ICICIC'06)
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First International Conference on Innovative Computing, Information and Control - Volume I (ICICIC'06) 2 301-304, 2006-10-24
IEEE