Phase-Tracking Loop based on Delta-Sigma Oversampling Architecture
説明
This paper presents a new oversampling architecture for implementing phase-tracking loop that is commonly utilized for position sensors such that synchro, resolver, and incremental encoder. This architecture consists of the cascade connection of three stage: coarse-quantizing and oversampling modulation, direct signal processing, and decimation filtering. It is expected that the oversampling strategy and the signal processing increase the resolution of detecting phase as well as oversampling A/D converters. This paper shows a simplest design of the signal processing circuit and some simulation results.
収録刊行物
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- 2006 IEEE International Symposium on Circuits and Systems
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2006 IEEE International Symposium on Circuits and Systems 3782-3785, 2006-09-22
IEEE