説明
We developed an application specific multi-processor generation system intended for realtime applications. In this system, we adopted a distributed memory type multi-processor architecture with hierarchical tree network as a configurable multiprocessor which can be adapted to various scale systems flexibly. We have also developed a configurable multi-processor prototype as LSI chips with the 0.18 /spl mu/m CMOS standard cell technology.
収録刊行物
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- Asia and South Pacific Conference on Design Automation, 2006.
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Asia and South Pacific Conference on Design Automation, 2006. 124-125, 2006-01-01
IEEE