A fine pitch and high aspect ratio bump fabrication process for flip-chip interconnection
説明
This paper describes the fabrication process for the finest pitch and highest aspect ratio bump arrays reported so far. Particularly noteworthy is the development of a new microstructural resist patterning technique in which electroplating is used to form the bumps. The alkaline solubility and dissolution effect parameter of the resist were evaluated to obtain the precise microstructural pattern. The finest pitch and highest aspect ratio resist patterns fabricated had a 10 /spl mu/m pitch with a 5 /spl mu/m diameter and a 50 /spl mu/m height, and they were arranged 5 /spl mu/m apart from each other.
収録刊行物
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- Proceedings of 1995 Japan International Electronic Manufacturing Technology Symposium
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Proceedings of 1995 Japan International Electronic Manufacturing Technology Symposium 121-124, 2002-11-19
IEEE