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Design of constant-coefficient multipliers
Description
This paper examines a conventional method for optimizing the design of CSD multipliers based on parallel Signed-Weight (SW) counter-tree architecture and another novel evolutionary-computation approach to automatically seeking optimal designs of multipliers. The comparisons of experimental results between them indicate that the evolutionary-computation method in most cases is comparable to or outperforms the conventional designs using CSD number representation.
Journal
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- ASICON 2001. 2001 4th International Conference on ASIC Proceedings (Cat. No.01TH8549)
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ASICON 2001. 2001 4th International Conference on ASIC Proceedings (Cat. No.01TH8549) 416-419, 2002-11-13
IEEE
