A 300 nW, 15 ppm/℃, 20 ppm/V CMOS Voltage Reference Circuit Consisting of Subthreshold MOSFETs

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  • A 300 nW, 15 ppm/degC, 20 ppm/V CMOS Voltage Reference Circuit Consisting of Subthreshold MOSFETs

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Abstract

A low-power CMOS voltage reference was developed using a 0.35 μm standard CMOS process technology. The device consists of MOSFET circuits operated in the subthreshold region and uses no resistors. It generates two voltages having opposite temperature coefficients and adds them to produce an output voltage with a near-zero temperature coefficient. The resulting voltage is equal to the extrapolated threshold voltage of a MOSFET at absolute zero temperature, which was about 745 mV for the MOSFETs we used. The temperature coefficient of the voltage was 7 ppm/℃ at best and 15 ppm/℃ on average, in a range from -20 to 80 ℃. The line sensitivity was 20 ppm/V in a supply voltage range of 1.4-3 V, and the power supply rejection ratio (PSRR) was -45 dB at 100 Hz. The power dissipation was 0.3 μW at 80 ℃. The chip area was 0.05 mm2. Our device would be suitable for use in subthreshold-operated, power-aware LSIs.

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  • CRID
    1050282813978915584
  • NII Book ID
    AA00667434
  • HANDLE
    2115/39949
  • ISSN
    00189200
  • Text Lang
    en
  • Article Type
    journal article
  • Data Source
    • IRDB

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