Verification by error modeling : using testing techniques in hardware verification

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Bibliographic Information

Title
"Verification by error modeling : using testing techniques in hardware verification"
Statement of Responsibility
by Katarzyna Radecka, Zeljko Zilic
Publisher
  • Kluwer Academic
Publication Year
  • c2003
Book size
25 cm

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Notes

Includes bibliographical references (p. [197]-209) and index

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