Design and Evaluation of Low-Complexity Radiation Hardened CMOS Latch for Double-Node Upset Tolerance
書誌事項
- 公開日
- 2020-06
- 権利情報
-
- https://ieeexplore.ieee.org/Xplorehelp/downloads/license-information/IEEE.html
- https://doi.org/10.15223/policy-029
- https://doi.org/10.15223/policy-037
- DOI
-
- 10.1109/tcsi.2020.2973676
- 公開者
- Institute of Electrical and Electronics Engineers (IEEE)
この論文をさがす
収録刊行物
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- IEEE Transactions on Circuits and Systems I: Regular Papers
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IEEE Transactions on Circuits and Systems I: Regular Papers 67 (6), 1925-1935, 2020-06
Institute of Electrical and Electronics Engineers (IEEE)
