Inter-Temperature Bandwidth Reduction in Cryogenic QAOA Machines

Bibliographic Information

Published
2024-01
Resource Type
journal article
Rights Information
  • https://ieeexplore.ieee.org/Xplorehelp/downloads/license-information/IEEE.html
  • https://doi.org/10.15223/policy-029
  • https://doi.org/10.15223/policy-037
DOI
  • 10.1109/lca.2023.3322700
  • 10.48550/arxiv.2310.01630
Publisher
Institute of Electrical and Electronics Engineers (IEEE)

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Description

The bandwidth limit between cryogenic and room-temperature environments is a critical bottleneck in superconducting noisy intermediate-scale quantum computers. This paper presents the first trial of algorithm-aware system-level optimization to solve this issue by targeting the quantum approximate optimization algorithm. Our counter-based cryogenic architecture using single-flux quantum logic shows exponential bandwidth reduction and decreases heat inflow and peripheral power consumption of inter-temperature cables, which contributes to the scalability of superconducting quantum computers.

4 pages, 5 figures, 1 table. Accepted by IEEE Computer Architecture Letters,

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