Low-ESL (<1 pH @ 8.5 GHz) Multi-Terminal Si Capacitor Embedded in 3D Functional Interposer for Power Delivery Network
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- Kyosuke Kobinata
- Tokyo Institute of Technology, IIR,The WOW Alliance,Kanagawa,Japan
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- Tatsuya Funaki
- Tokyo Institute of Technology, IIR,The WOW Alliance,Kanagawa,Japan
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- Yoshiaki Satake
- Tokyo Institute of Technology, IIR,The WOW Alliance,Kanagawa,Japan
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- Hitoshi Matsuno
- Tokyo Institute of Technology, IIR,The WOW Alliance,Kanagawa,Japan
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- Seiji Hidaka
- Tokyo Institute of Technology, IIR,The WOW Alliance,Kanagawa,Japan
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- Shunsuke Abe
- Tokyo Institute of Technology, IIR,The WOW Alliance,Kanagawa,Japan
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- Hiroyuki Ito
- Tokyo Institute of Technology, IIR,The WOW Alliance,Kanagawa,Japan
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- Chih-Cheng Hsiao
- Industrial Technology Research Institute,Hsinchu,Taiwan
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- Sheng Yi Li
- Industrial Technology Research Institute,Hsinchu,Taiwan
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- Youngsuk Kim
- Tokyo Institute of Technology, IIR,The WOW Alliance,Kanagawa,Japan
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- Takayuki Ohba
- Tokyo Institute of Technology, IIR,The WOW Alliance,Kanagawa,Japan
収録刊行物
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- 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
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2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) 2022-06-12
IEEE