25.2 A 1.2V 8Gb 8-channel 128GB/s high-bandwidth memory (HBM) stacked DRAM with effective microbump I/O test methods using 29nm process and TSV

収録刊行物

• 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC)

  2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC) 2014-02

  IEEE