Development of Embedded Device Package, MCeP<sup>®</sup> (Molded Core embedded Package)
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- Tanaka Kouichi
- Interconnect Technology Development Dept. Research & Development Div. Shinko Electric Industries Co., LTD
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- Machida Yoshihiro
- Interconnect Technology Development Dept. Research & Development Div. Shinko Electric Industries Co., LTD
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- Nakamura Atsushi
- Interconnect Technology Development Dept. Research & Development Div. Shinko Electric Industries Co., LTD
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- Umehara Masato
- Design Dept. IC Assembly Div. Shinko Electric Industries Co., LTD
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- Koyama Tetsuya
- Interconnect Technology Development Dept. Research & Development Div. Shinko Electric Industries Co., LTD
Bibliographic Information
- Other Title
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- 部品内蔵パッケージ MCeP<sup>®</sup> (Molded Core embedded Package) の開発
- 平成28年技術賞受賞講演 部品内蔵パッケージMCeP (Molded Core embedded Package)の開発
- ヘイセイ 28ネン ギジュツショウ ジュショウ コウエン ブヒン ナイゾウ パッケージ MCeP (Molded Core embedded Package)ノ カイハツ
- Development of Embedded Device Package, MCeP<sup>®</sup> (Molded Core embedded Package)
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Description
Along with miniaturization of mobile devices, the PoP (Package on Package) structure has been adopted for high-density 3D packaging. However, the conventional PoP structure using FC-BGA (Flip Chip-BGA) has some issues regarding package warpage and thickness. To resolve these issues, we have developed an embedded device package named MCeP® (Molded Core embedded Package) for the bottom package of the PoP structure. MCeP® consists of a top substrate, a bottom substrate and an embedded layer in which the IC device is encapsulated by molding resin. This package has the beneficial characteristic of reducing package warpage. It is possible to control package warpage by optimizing the thickness and material of each layer (top substrate, bottom substrate and embedded layer).<br>In this paper, we describe the MCeP® structure, process flow and simulation, as well as measurements of package warpage when changing the thickness of each layer and the CTE (Coefficient of Thermal Expansion) of the substrate.
Journal
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- Journal of The Japan Institute of Electronics Packaging
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Journal of The Japan Institute of Electronics Packaging 20 (6), 418-424, 2017
The Japan Institute of Electronics Packaging
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Details 詳細情報について
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- CRID
- 1390001204560729856
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- NII Article ID
- 130006038652
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- NII Book ID
- AA11231565
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- ISSN
- 1884121X
- 13439677
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- NDL BIB ID
- 028516208
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- Text Lang
- ja
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- Data Source
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- JaLC
- NDL Search
- Crossref
- CiNii Articles
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- Abstract License Flag
- Disallowed