Evaluation of Relationship between Residual Stress on Chip Using Non-Conductive Film and Package Warpage Caused by Flip-Chip Bonding Process Using Test Element Group Chips with Piezoresistive Sensors

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  • Enami Toshio
    R&D Institute High Performance Plastics Company, Sekisui Chemical Co., Ltd. Department of Electronic Engineering and Computer Science, Fukuoka University
  • Horiuchi Osamu
    Center of System Integration Platform Organization Standards (CSIPOS), Fukuoka University
  • Han Young-Gun
    Center of System Integration Platform Organization Standards (CSIPOS), Fukuoka University
  • Tomokage Hajime
    Department of Electronic Engineering and Computer Science, Fukuoka University Center of System Integration Platform Organization Standards (CSIPOS), Fukuoka University

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In this study, the relationship between the residual stress and the warpage of Si chip flip-chip bonded (FCB) on a substrate using non-conductive film (NCF) is investigated with increasing temperature up to 120°C. The Si chip including piezo-resistive sensors for measuring the residual stress is diced to be 9 × 9 mm2 size after thinned down to 200 μm or 550 μm thickness. Two different package substrates are used like as FR4 organic substrate and Si base one. The stress inside the chip is measured after FCB process using three kinds of NCFs, those have the different glass transition temperature (Tg). The residual stress decreased with increasing Tg of NCF for Si chip on organic substrate system regardless of Si chip thickness. Whereas, another package of Si chip bonded on Si substrate did not show a dependency on NCF. The warpages of Si chip bonded on each substrate are measured by Moiré method and the warpage maximum value and contours could be matched well to the measured residual stress values and shapes.

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