Analysis and PCB Design of Class D Inverter for Wireless Power Transfer Systems Operating at 13.56MHz
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- Trung Nguyen Kien
- Graduate School of Engineering and Science, Shibaura Institute of Technology
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- Ogata Takuya
- Graduate School of Engineering and Science, Shibaura Institute of Technology
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- Tanaka Shinichi
- Graduate School of Engineering and Science, Shibaura Institute of Technology
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- Akatsu Kan
- Graduate School of Engineering and Science, Shibaura Institute of Technology
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抄録
This paper presents the analysis and PCB design of a class D inverter for wireless power transfer systems operating at 13.56MHz. The effects of parasitic inductance on the switching performance of MOSFETs, transfer efficiency of WPT systems, and power loss are analyzed. At high frequencies, the print circuit board (PCB) design is very critical because it control the parasitic elements on the circuit. This study proposes an improved PCB design that can provide a 23.4% decrease in parasitic inductance over the conventional PCB design.
収録刊行物
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- IEEJ Journal of Industry Applications
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IEEJ Journal of Industry Applications 4 (6), 703-713, 2015
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