Design for Testability Methods for Detecting Resistive Opens at Chip Interconnects
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- Yotsuyanagi Hiroyuki
- Tokushima University
Bibliographic Information
- Other Title
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- チップ間接続の半断線検出のための検査容易化設計手法
Journal
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- Journal of The Japan Institute of Electronics Packaging
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Journal of The Japan Institute of Electronics Packaging 26 (2), 198-202, 2023-03-01
The Japan Institute of Electronics Packaging
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Details 詳細情報について
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- CRID
- 1390013795251431680
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- ISSN
- 1884121X
- 13439677
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- Text Lang
- ja
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- Data Source
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- JaLC
- Crossref
