An Ultra-low Power Voltage Reference Circuit consisting of Subthreshold MOSFETs

DOI Web Site 21 References
  • UENO Ken
    Graduate School of Information Science and Technology, Hokkaido University
  • HIROSE Tetsuya
    Department of Electrical and Electronics Engineering, Kobe University
  • ASAI Tetsuya
    Graduate School of Information Science and Technology, Hokkaido University
  • AMEMIYA Yoshihito
    Graduate School of Information Science and Technology, Hokkaido University

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Other Title
  • MOSFETのサブスレッショルド特性を利用した超低消費電力CMOS参照電圧源回路(アナログ,アナデジ混載,RF及びセンサインタフェース回路)
  • MOSFETのサブスレッショルド特性を利用した超低消費電力CMOS参照電圧源回路
  • MOSFET ノ サブスレッショルド トクセイ オ リヨウシタ チョウテイショウヒ デンリョク CMOS サンショウ デンアツゲン カイロ

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Abstract

An ultra-low power CMOS voltage reference circuit has been fabricated in 0.35-μm standard CMOS process. The circuit generates a reference voltage based on threshold voltage of a MOSFET at absolute zero temperature. Theoretical analyses and experimental results showed that the circuit generates a quite stable reference voltage of 745 mV on average. The temperature coefficient and line sensitivity of the circuit were 7 ppm/℃ and 20 ppm/V, respectively. The power supply rejection ratio (PSRR) was -45 dB at 100 Hz. The circuit consists of subthreshold MOSFETs with a low-power dissipation of 0.3μW or less, and a 1.5-V power supply. Because the circuit generates a reference voltage based on threshold voltage of a MOSFET in an LSI chip, it can be used as an on-chip process monitoring circuit and a part of the on-chip process compensation circuit systems.

Journal

  • ITE Technical Report

    ITE Technical Report 32.45 (0), 55-60, 2008

    The Institute of Image Information and Television Engineers

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