The Influence that Via Structure and Its Near Wirings Give to Transmission Line Loss in High-Speed Transmission PCB

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  • Sugimoto Kaoru
    Business Development Division, Fujitsu Interconnect Technologies Limited,
  • Kawai Kenichi
    Technology Development Division, Advanced System Research & Development Unit, Fujitsu Limited,
  • Adachi Hiroyuki
    Technology Development Division, Advanced System Research & Development Unit, Fujitsu Limited,
  • Mizutani Daisuke
    Monozukuri Technologies Laboratory, Fujitsu Laboratories Ltd.,
  • Akahoshi Tomoyuki
    Monozukuri Technologies Laboratory, Fujitsu Laboratories Ltd.,
  • Yokouchi Kishio
    Business Development Division, Fujitsu Interconnect Technologies Limited,
  • Watanabe Mitsuhiro
    Materials & Surface Engineering Research Institute, Kanto Gakuin University
  • Honma Hideo
    Materials & Surface Engineering Research Institute, Kanto Gakuin University

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  • 高速伝送基板におけるVia構造とその近傍配線が伝送損失に与える影響
  • コウソク デンソウ キバン ニ オケル Via コウゾウ ト ソノ キンボウ ハイセン ガ デンソウ ソンシツ ニ アタエル エイキョウ

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Abstract

In addition to low-dielectric-constant materials and skin effects of routing patterns, a routing technique that minimizes electromagnetic noise is essential to increase transmission speeds. Therefore, we need to consider reducing transmission losses caused by reflection and cross talk that results from the placement of through holes and traces closed to them as well as via structures on the core layer used in CPU packaging substrates. This paper uses a simulation method to confirm the influence on transmission losses of structures that consist of signal vias and traces closed to them in the routing design of high-signal-transmission PCBs.

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