Package-level Fault Diagnosis of Sequential Circuits Based on Automated Reasoning
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- Nakagawa Yoshihiro
- Hokkaido Institute of Technology
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- Oda Tadaaki
- Hokkaido University
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- Kurihara Masahito
- Hokkaido University
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- Ohuchi Azuma
- Hokkaido University
Bibliographic Information
- Other Title
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- 自動推論による順序回路のパッケージレベル故障診断
- ジドウ スイロン ニ ヨル ジュンジョ カイロ ノ パッケージ レベル コショ
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Description
We present a general fault diagnosis theory which extends the Reiter's component-level theory to the package-level.<br>In our theory, a system is defined as (SD, COMPONENTS, PACKAGES, OBS), where SD (system description) is a set of first-order logic sentences, COMPONENTS (system components) is a set of constants, and PACKAGES is a partition of COMPONENTS. Each element of PACKAGES is called a package. Observation OBS is described as a set of first-order sentences.<br>Package-level diagnosis is a minimal set Δp of PACKAGES such that<br>SD_??_OBS_??_{_??_ AB(c)/c∈COMPONENTS-comp(Δp)}<br>is consistent, where comp (Δp)={c|(_??_P)c∈P∈Δp} and AB(c) means that the component c is abnormal.<br>Based on theory, we developed a package-level diagnosis algorithm which uses a mechanical theorem prover for detecting a discrepancy between SD and OBS. We implemented it by using the automated reasoning system Thinker, which we have developing since 1984.<br>We applied it to the diagnosis of typical sequential circuits such that a synchronous counter and an automatic vending machine, where SD consists of the description of gates, wiring, axioms of Boolean algebra, etc.<br>The example of counter circuits, which has 3 packages (3 JK-type flip-flops and an and gate), demonstrates that we have to explicitly embed the clock time into these descriptions. The automatic vending machine consists of 18 packages (53 components including 3 D-type flip-flops), and the diagnosis time for detecting all of the 6 single-level package fault was about 25 min. In this process, Thinker was invoked 37 times.<br>The experiments show that the proposed approach is practical for large-scale sequential circuits.
Journal
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- IEEJ Transactions on Electronics, Information and Systems
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IEEJ Transactions on Electronics, Information and Systems 110 (8), 500-507, 1990
The Institute of Electrical Engineers of Japan
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Details 詳細情報について
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- CRID
- 1390282679584161664
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- NII Article ID
- 130006843436
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- NII Book ID
- AN10065950
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- ISSN
- 13488155
- 03854221
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- NDL BIB ID
- 3674002
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- Data Source
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- JaLC
- NDL Search
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- CiNii Articles
- OpenAIRE
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- Abstract License Flag
- Disallowed