Stable Extraction of Threshold Voltage Using Transconductance Change Method for CMOS Modeling, Simulation and Characterization

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  • Choi Woo Young
    Inter-University Semiconductor Research Center, Seoul National University School of Electrical Engineering, Seoul National University
  • Woo Dong-Soo
    Inter-University Semiconductor Research Center, Seoul National University School of Electrical Engineering, Seoul National University
  • Choi Byung Yong
    Inter-University Semiconductor Research Center, Seoul National University School of Electrical Engineering, Seoul National University
  • Lee Jong Duk
    Inter-University Semiconductor Research Center, Seoul National University School of Electrical Engineering, Seoul National University
  • Park Byung-Gook
    Inter-University Semiconductor Research Center, Seoul National University School of Electrical Engineering, Seoul National University

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We proposed a stable extraction algorithm for threshold voltage using transconductance change method by optimizing node interval. With the algorithm, noise-free gm2 (=dgm⁄dVGS) profiles can be extracted within one-percent error, which leads to more physically-meaningful threshold voltage calculation by the transconductance change method. The extracted threshold voltage predicts the gate-to-source voltage at which the surface potential is within kT⁄q of φs=2φf+VSB. Our algorithm makes the transconductance change method more practical by overcoming noise problem. This threshold voltage extraction algorithm yields the threshold roll-off behavior of nanoscale metal oxide semiconductor field effect transistor (MOSFETs) accurately and makes it possible to calculate the surface potential φs at any other point on the drain-to-source current (IDS) versus gate-to-source voltage (VGS) curve. It will provide us with a useful analysis tool in the field of device modeling, simulation and characterization.

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