Bit-cost scalable technology for ultrahigh-density flash memory
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- FUKUZUMI Yoshiaki
- Center for Semiconductor Research & Development, TOSHIBA Corporation, Semiconductor Company
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- AOCHI Hideaki
- Center for Semiconductor Research & Development, TOSHIBA Corporation, Semiconductor Company
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- NITAYAMA Akihiro
- Center for Semiconductor Research & Development, TOSHIBA Corporation, Semiconductor Company
Bibliographic Information
- Other Title
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- 超高密度を実現する三次元フラッシュメモリー
- チョウコウミツド オ ジツゲンスル 3ジゲン フラッシュ メモリー
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Description
<p>Three-dimensional memories are gathering increasing attention as future ultrahigh-density memory technologies that can sustain the trend of increasing bit density and reducing bit cost. Among several proposals, one of the promising candidates is Bit-Cost Scalable (BiCS) flash technology, by which a multi-stacked memory array can be realized with a few constant critical lithography steps regardless of the number of stacked layers. To realize BiCS flash memory, one of the most essential technologies is well-controlled polycrystalline silicon channel vertical transistors. In this paper, the concept of BiCS flash and ‘macaroni’ body vertical FETs for its array devices are presented.</p>
Journal
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- Oyo Buturi
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Oyo Buturi 77 (9), 1072-1077, 2008-09-10
The Japan Society of Applied Physics
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Keywords
Details 詳細情報について
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- CRID
- 1390564227310666368
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- NII Article ID
- 10024192255
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- NII Book ID
- AN00026679
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- ISSN
- 21882290
- 03698009
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- NDL BIB ID
- 9640240
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- Text Lang
- ja
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- Data Source
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- JaLC
- NDL
- CiNii Articles
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- Abstract License Flag
- Disallowed