Bit-cost scalable technology for ultrahigh-density flash memory

  • FUKUZUMI Yoshiaki
    Center for Semiconductor Research & Development, TOSHIBA Corporation, Semiconductor Company
  • AOCHI Hideaki
    Center for Semiconductor Research & Development, TOSHIBA Corporation, Semiconductor Company
  • NITAYAMA Akihiro
    Center for Semiconductor Research & Development, TOSHIBA Corporation, Semiconductor Company

Bibliographic Information

Other Title
  • 超高密度を実現する三次元フラッシュメモリー
  • チョウコウミツド オ ジツゲンスル 3ジゲン フラッシュ メモリー

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Description

<p>Three-dimensional memories are gathering increasing attention as future ultrahigh-density memory technologies that can sustain the trend of increasing bit density and reducing bit cost. Among several proposals, one of the promising candidates is Bit-Cost Scalable (BiCS) flash technology, by which a multi-stacked memory array can be realized with a few constant critical lithography steps regardless of the number of stacked layers. To realize BiCS flash memory, one of the most essential technologies is well-controlled polycrystalline silicon channel vertical transistors. In this paper, the concept of BiCS flash and ‘macaroni’ body vertical FETs for its array devices are presented.</p>

Journal

  • Oyo Buturi

    Oyo Buturi 77 (9), 1072-1077, 2008-09-10

    The Japan Society of Applied Physics

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