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- HIGAMI Yoshinobu
- Department of Computer Science, Ehime University
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- KAJIHARA Seiji
- Department of Computer Sciences and Electronics, Kyushu Institute of Technology
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- POMERANZ Irith
- School of Electrical and Computer Engineering, Purdue University
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- KOBAYASHI Shin-ya
- Department of Computer Science, Ehime University
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- TAKAMATSU Yuzo
- Department of Computer Science, Ehime University
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説明
Recently there are various requirements for LSI testing, such as test compaction, test compression, low power dissipation or increase of defect coverage. If test sequences contain lots of don't cares (Xs), then their flexibility can be used to meet the above requirements. In this paper, we propose methods for finding as many Xs as possible in test sequences for sequential circuits. Given a fully specified test sequence generated by a sequential ATPG, the proposed methods produce a test sequence containing Xs without losing stuck-at fault coverage of the original test sequence. The methods apply an approach based on fault simulation, and they introduce some heuristics for reducing the simulation effort. Experimental results for ISCAS'89 benchmark circuits show the effectiveness of the proposed methods.
収録刊行物
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- IEICE transactions on information and systems
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IEICE transactions on information and systems 89 (11), 2748-2755, 2006-11-01
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詳細情報 詳細情報について
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- CRID
- 1571135652567545344
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- NII論文ID
- 110007538482
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- NII書誌ID
- AA10826272
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- ISSN
- 09168532
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- 本文言語コード
- en
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- データソース種別
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- CiNii Articles
- KAKEN