A 5 to 10GHz Low Spurious Triple Tuned Type PLL Synthesizer Driven by DDS

TAJIMA Ken'ichi, IMAI Yoshihiko, KANAGAWA Yousuke, ITOH Kenji

Bibliographic Information

Other Title

5-10GHz帯3同調形低スプリアスDDS駆動PLLシンセサイザ

Description

An octave-bandwidth frequency synthesizer has been developed for a wide-band reception in RF measurement systems. The PLL synthesizer driven by the DDS is applied to achieve octave-bandwidth and narrow channel step with a single PLL circuit. The PLL synthesizer employs triple tuned topology which corrects output frequency of the DDS, division ratios of variable frequency dividers in reference port and feedback path of the PLL. With this configuration, high level spurious components of DDS are avoided from the pass-band of the PLL. A frequency converter at output of DDS is used for suppressing spurious components. Since the converter reduces a transfer gain from the DDS to PLL output. A developed 5 to 10GHz-band PLL synthesizer with channel step 625kHz has spurious level below -46dBc and phase noise of -105dBc/Hz@ 1MHz offset.

Journal

IEICE technical report. Microwaves

IEICE technical report. Microwaves 96 (439), 43-48, 1996-12-20

The Institute of Electronics, Information and Communication Engineers

Keywords

Details 詳細情報について

CRID: 1573105977221004544

NII Article ID: 110003189423

NII Book ID: AN10013185

Text Lang: ja

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