改良 Booth 法に基づく乗算回路のC-テスタブル設計について

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Bibliographic Information

Other Title
  • C-Testable Design of Multipliers Based on the Modified Booth Algorithm

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Description

本稿では,改良Booth法に基づく乗算回路のテスト容易化設計について考察し,2つのC-テスタブルな乗算回路を提案する.単一縮退故障モデルに対するC-テスタブルな乗算回路は,一つの付加外部入力と17個のテストゾーンが必要である.また,セル故障モデル(CFM)に対するC-テスタブルな乗算回路は,それぞれのセルに全ての入力の組合せが印加できる.このC-テスタブルな乗算回路は,一つの付加外部入力と34個のテストパターンが必要である.
In this paper, we consider the design for testability of multipliers based on the modified Booth Algorithm. We present a strategy to design for C-testability. The designed multiplier for the single stuck-at fault model is C-testable with 17 test patterns. This design requires the addition of one extra primary input. Also the Cell Fault Model (CFM) has been adopted to develop another C-testable design. In the second design each cell of the multiplier can be tested exhaustively. In this case C-testability is achieved with 34 test patterns. This design too requires the addition of one extra primary input.

Journal

  • Technical report of IEICE. ICD

    Technical report of IEICE. ICD 96 (557), 1-8, 1997-03-06

    The Institute of Electronics, Information and Communication Engineers

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Details 詳細情報について

  • CRID
    1573105977274077312
  • NII Article ID
    110003316764
  • NII Book ID
    AN10013276
  • Text Lang
    en
  • Data Source
    • CiNii Articles

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