Test Pattern Generation for CMOS Open Defect Detection by Supply Current Testing under AC Electric Field

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Description

In this paper, supply current testing for detecting open defects in CMOS circuits is discussed. It is known that open defects cause unpredictable faulty effects and are difficult to be detected. In our test method, an AC electric field is applied during testing. The voltage at a floating node caused by an open defect is varied by the applied electric field and then the defect can be detected. The test pattern generation procedure for open defects is proposed and is applied to benchmark circuits. The experimental results shows that the number of test vectors for opens are much smaller than that for stuck-at faults. The experimental evaluation for an LSI chip is also shown to present the feasibility of our test method.

Journal

  • IEICE Tran. Inf. & Syst., D

    IEICE Tran. Inf. & Syst., D 86 (12), 2666-2673, 2003-12-01

    The Institute of Electronics, Information and Communication Engineers

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Keywords

Details 詳細情報について

  • CRID
    1573668927254908928
  • NII Article ID
    110003213691
  • NII Book ID
    AA10826272
  • ISSN
    09168532
  • Text Lang
    en
  • Data Source
    • CiNii Articles

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