Lateral SOI diode design optimization for high ruggedness and low temperature dependence of reverse recovery characteristics

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This paper compares, for the first time, the maximum controllable current, or SOA of three different diode structures with low efficiency emitters. Low anode emitter efficiency is achieved either by introducing n/sup +/ diffusions in the p-type anode region (n/sup +//p/sup +/ diodes), or by adopting a low surface concentration anode (p/sup -//p/sup +/ diodes), or by shallow p diffusion (shallow p/p/sup +/ diodes). It was found that the n/sup +//p/sup +/ diode was easily destroyed in the reverse recovery transient at a high temperature of 150/spl deg/C because of a parasitic n-p-n transistor action. The best optimization was found in p/sup -//p/sup +/ diodes. Shallow p/p/sup +/ diodes exhibited the same ruggedness, if the dose of the shallow p layer was optimized.

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