- 【Updated on May 12, 2025】 Integration of CiNii Dissertations and CiNii Books into CiNii Research
- Trial version of CiNii Research Knowledge Graph Search feature is available on CiNii Labs
- 【Updated on June 30, 2025】Suspension and deletion of data provided by Nikkei BP
- Regarding the recording of “Research Data” and “Evidence Data”
Manufacturability of 2x-nm devices with EUV tool
Search this article
Description
Due to the promising development status of EUVL as a practical lithography technology for the 2x-nm node, we are continuing to evaluate its process liability using the EUV1 at Selete, which has an Off-Axis illumination capability. The resolution limit of the EUV1 for L&S patterns is currently 18 nm for dipole illumination, and 16 nm for aggressive dipole illumination. This study examined the critical points of EUVL for device manufacturing through wafer processes. The yield obtained from electrical measurements indicates the maturity of the technology, including the resist process, the tool, and the mask. Optimization of the resist and RIE processes significantly improved the yield. The final yields obtained from electrical measurements were 100% for hp 30 nm, 70% for hp 28 nm, and 40% for hp 26 nm. These results demonstrate EUV lithography to be a practical technology that is now suitable for 2x nm semiconductor manufacture.
Journal
-
- SPIE Proceedings
-
SPIE Proceedings 7969 79691L-, 2011-03-17
SPIE
- Tweet
Details 詳細情報について
-
- CRID
- 1872272492831459968
-
- ISSN
- 0277786X
-
- Data Source
-
- OpenAIRE