A new test structure to measure precise location of hot-carrier-induced photoemission peak from gate center of subquarter-micron n-MOSFETs

Description

A new test structure, which has a 0.5 /spl mu/m line-and-space polysilicon pattern with the center aligned on the MOSFET's gate center, is proposed for hot carrier analysis of sub-quarter micron devices. Hot-carrier-induced photoemission effects were measured using a photoemission microscope with a liquid N/sub 2/ cooled CCD imager. We successfully measured a peak position of photoemission intensity from the center of the MOSFET gate with a spatial resolution sufficiently less than /spl plusmn/24 nm at microscope magnification of 1000/spl times/.

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