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Optimal system-on-chip test scheduling
Description
In this paper, we show that the scheduling of tests on the test access mechanism (TAM) is equivalent to independent job scheduling on identical machines and we make use of all existing preemptive scheduling algorithm to produce an optimal solution in linear time. We extend the algorithm to handle (1) test conflicts elite to interconnection tests and (2) cases when a test limits all optimal usage of the TAM by using reconfigurable core test wrappers. Our extensions preserve the production of all optimal solution in respect to test time and minimizes the number of wrapper configurations as well as the TAM usage at each core. which implicitly minimizes the TAM routing. Experiments with our implementation shows its efficiency in comparison with previous approaches.
Journal
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- Proceedings of the 7th International Conference on Properties and Applications of Dielectric Materials (Cat No 03CH37417) ATS-03
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Proceedings of the 7th International Conference on Properties and Applications of Dielectric Materials (Cat No 03CH37417) ATS-03 306-311, 2003-01-01
IEEE