書誌事項
- タイトル別名
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- Evaluation of Thermal Resistance for Underfill Layer in Three-dimensional Stacked ICs by Transient Thermal Analysis
- カト ネツ カイセキ ニ ヨル 3ジゲン セキソウ IC ナイ ノ アンダーフィルソウ ノ ネツ テイコウ ノ ヒョウカ
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抄録
In this study, the relation between thermal conductivity of underfill and thermal resistance of micro bump layer in threedimensional stacked ICs was investigated. Thermal analysis model of stacked ICs with local heat source was created and thermal transient simulation was carried out. Thermal structure function of the model was calculated and thermal resistance of micro bump layer was evaluated. As a result, it was found that increase in thermal conductivity of underfill up to 6 W/m・K caused a rapid decrease in thermal resistance of micro bump layer. On the other hand, when thermal conductivity of underfill was larger than that value, thermal resistance of micro bump layer was almost stable.
収録刊行物
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- Journal of Smart Processing
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Journal of Smart Processing 7 (4), 122-127, 2018
一般社団法人 スマートプロセス学会 （旧高温学会）
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詳細情報 詳細情報について
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- CRID
- 1390001288125585664
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- NII論文ID
- 130007604669
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- NII書誌ID
- AA12553487
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- ISSN
- 21871337
- 2186702X
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- NDL書誌ID
- 029175391
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- 本文言語コード
- ja
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- データソース種別
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- JaLC
- NDL
- Crossref
- CiNii Articles
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- 抄録ライセンスフラグ
- 使用不可