CMOS Open Defect Detection by Supply Current Measurement under Time-Variable Electric Field Supply

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説明

In this paper, a new test method is proposed for detecting open defects in CMOS logic ICs. The method is based on supply current of ICs generated by supplying time-variable supply voltage and electric field from the outside of the ICs. Also, test input vectors for the test method are proposed and it is shown that they can be generated more easily than functional test methods based on stuck-at fault models. The feasibility of the test is examined by some experiments. The empirical results promise us that by using the method, open defects in CMOS ICs can be detected.

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詳細情報 詳細情報について

  • CRID
    1574231876981112832
  • NII論文ID
    110006376584
  • NII書誌ID
    AA10826272
  • ISSN
    09168532
  • 本文言語コード
    en
  • データソース種別
    • CiNii Articles

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