SRAM Variability and Supply Voltage Scaling Challenges

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We have developed a methodology for SRAM cell design that unifies all the major design criterion - cell stability, write margin, read speed and leakage into a single metric. This metric has been used to design a 65nm cell while accounting for challenges posed by increased Vt variability, Vcc scaling and NBTI drift. The impact of NBTI drift on the periphery of a high speed SRAM has been simulated and measured

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